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AUDIO EFFECT PROCESSOR
S5A1901H02
PRODUCT OVERVIEW
OVERVIEW 100-QFP-1420C The S5A1901H02, Audio Effect Processor, reproduces vivid sound of certain places and dynamic sound of movies. The S5A1901H02 has over 15 sound effect modes including two kinds of Karaoke mode. In addition to the sound modes, the S5A1901H02 provides mic-echo, vocal canceller, loudness function, graphic equalizer, spectrum analyzer interface, tone control and volume/balance control so that it can satisfy various sound requirements of audio systems including TV, stereo audio systems, etc. Furthermore, the S5A1901H02 has built-in 16 bit stereo - ADC and DAC for easy application. The S5A1901H02 also includes two digital source interface blocks and a host interface block supporting normal microcontroller and I2C bus interfaces.
KEY FEATURES * * * * * * * * * * * * * * * * * Over 15 Sound Effect Modes including two kinds of Karaoke mode 3/5/7-band Graphic Equalizer and 5/7-band Spectrum Analyzer Interface Mic-Echo, Loudness Function and Vocal Canceller Digital Volume/Balance/Tone Control Fader Function for Car Stereo System Programmable Sound Mode 33 MIPS 16 bit fixed point DSP Core (SSP1610) Built-in Stereo 16 bit - ADC and DAC External Clock: 16.9344MHz Sampling Frequency: 44.1kHz Support Various Digital Audio Interface Formats Normal Microcontroller Interface and I2C Bus Interface 0.5 Kword Internal Data RAM and 6 Kword Delay Memory for Sound Effect 6 Kword Internal Program ROM and 0.5 Kword Parameter ROM for Movie Mode 5 V Single Power Supply 0.5m Triple Metal CMOS Process Package: 100 QFP
ORDERING INFORMATION Device S5A1901H02-Q0R0 (Audio Effect Processor) Package 100-QFP-1420C Temperature Range 0C - 70C
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S5A1901H02
AUDIO EFFECT PROCESSOR
APPLICATIONS * * * * * * CD Player Video CD TV Karaoke System Car Stereo System General Stereo Audio Systems
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S5A1901H02
TYPICAL APPLICATION
Spectrum Analyzer
Digital Source -COM AEP
for Recording
Analog Source
Vol
Bal
Tone
Sound Effect & Karaoke Mode
Spectrum Analyzer
( ProLogic )
Digital Source -COM AEP
Vol
Bal
Tone
with ProLogic
Figure 1. S5A1901H02 Typical Application
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AUDIO EFFECT PROCESSOR
BLOCK DIAGRAM
SPWDN
CONTROL & TEST LOGIC
TINT1
RESB
CRU
DLRCKO2,DBCKO2, DSDO2 DLRCKI2,DBCKI2, DSDI2 ALI,ARI
CIU Data RAM Data RAM
DSIU2
16 Bit Stereo - CODEC
CMCLKS ALO,ARO VREF,VREFI
DSIU1 Program ROM DSP
DLRCKI1,DBCKI1, DSDI1 DLRCKO1,DBCKO1 DSDO1
MIU
Delay RAM
SEIU
CLK1 CLK2 (33.8688MHz) (16.9344MHz) CLK3 (11.2896MHz)
3-D Parameter ROM
HDATA HWEB,HCLK HMS,SAS SDA SCL
SAIU
HIU CGU
I2C
HACK
CLKS
MCLK
XO
XI
CLKO
* CRU : Configuration Register Unit * CIU : Built-in CODEC Interface Unit * DSIU1 : Digital Source Interface Unit 1 * DSIU2 : Digital Source Interface Unit 2 * MIU : Memory Interface Unit * SEIU : Stereo Enhancement Interface Unit * HIU : Host Interface Unit * SAIU : Spetrum Analyzer Interface Unit * I 2C : I 2C Interface Unit * CGU : Clock Generation Unit
Figure 2. S5A1901H02 Block Diagram
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PIN ASSIGNMENT
GND12
VDD12
VREFI
RESB
VCC2
VREF
VCC1
VSS1
ARI
ALI
NC
NC
NC
NC
NC
NC
NC
NC
NC 82
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
ALO ARO VSS2 VDD13 GND13 VDD0 GND0 NC NC NC NC VDD1 GND1 NC NC NC NC VDD2 GND2 NC NC NC NC NC NC NC NC VDD3 GND3 SAS
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
81 80 79 78 77 76 75 74 73 72 71 70 69 68 67
NC
NC NC VDD11 GND11 NC NC NC NC GND10 VDD10 MCLK CLKS XI XO GND9 VDD9 CLKO NC SPWDN NC TINT1 HACK GND8 VDD8 DLRCKI1 DBCKI1 DSDI1 GND7 VDD7 DLRCKO1
S5A1901H02
(Audio Effect Processor)
66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
GND4
GND5
DLRCKI2
DSDI2
HDATA
GND6
HMS
VDD4
SCL
VDD5
VDD6
HCLK
DBKCO2
DLRCKO2
Figure 3. S5A1901H02 Pin Assignmen
DBCKO1
HWEB
DSDO2
DBCKI2
DSDO1
SDA
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S5A1901H02 PIN DESCRIPTION
No 1 2 3 4 5 6 7 8~11 12 13 14~17 18 19 20~27 28 29 30 31 32 33 34 35 36 37 38 39 40
Pin Name ALO ARO VSS2 VDD13 GND13 VDD0 GND0 NC VDD1 GND1 NC VDD2 GND2 NC VDD3 GND3 SAS HMS HCLK HWEB HDATA VDD4 GND4 SCL SDA VDD5 GND5
I/O AO AO AG DP DG DP DG - DP DG - DP DG - DP DG DI DI DI DI I/O DP DG DI I/O DP DG
Function D/A analog output: left channel, 1Vrms magnitude centered around VREF D/A analog output: right channel, 1 Vrms magnitude centered around VREF Codec analog ground Codec digital power +5 V Codec digital ground Codec digital power +5 V Codec digital ground Reserved for chip test Digital power +5 V Digital ground Reserved for chip test Digital power +5 V Digital ground Reserved for chip test Digital power +5 V Digital ground I2C bus interface slave address selection Host interface mode selection (0: normal, 1: I2C) Normal host interface bit clock (max 400kHz) Normal host interface write enable (HWEB = 0: write, HWEB = 1: read) Normal host interface data In/Out (HWEB = 0: in, HWEB = 1: out) Digital power +5 V Digital ground I2C bus interface serial bit clock I2C bus interface serial data in/out Digital power +5 V Digital ground
Pad Type - - - - - - - - - - - - - - - - - -
Schmitt trigger Schmitt trigger
Pull Up/Down - - - - - - - - - - - - - - - - Down Down Up Up Down - - - - - -
Schmitt trigger
- - Open drain Open drain - -
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S5A1901H02 PIN DESCRIPTION (Continued)
No 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70
Pin Name DSDI2 DBCKI2 DLRCKI2 VDD6 GND6 DSDO2 DBCKO2 DLRCKO2 DSDO1 DBCKO1 DLRCKO1 VDD7 GND7 DSDI1 DBCKI1 DLRCKI1 VDD8 GND8 HACK TINT1 NC SPWDN NC CLKO VDD9 GND9 XO XI CLKS MCLK
I/O DI DI DI DP DG DO DO DO DO I/O I/O DP DG DI DI DI DP DG DO DO DO DO DP DG DO DI DI I/O
Function Digital serial data input 2 (DSDI2) DSDI2 bit clock DSDI2 left/right flag clock Digital power +5 V Digital ground Digital serial data output 2 (DSDO2) DSDO2 bit clock DSDO2 left/right flag clock Digital serial data output 1 (DSDO1) DSDO1 bit clock DSDO1 left/right flag clock Digital power +5 V Digital ground Digital serial data input 1 (DSDI1) DSDI1 bit clock DSDI1 left/right flag clock Digital power +5 V Digital ground Normal host interface acknowledge Interrupt indicator Reserved for chip test System power down indicator Reserved for chip test Clock output 33.8688 / 3 = 11.2896MHz Digital power +5 V Digital ground Crystal oscillator output terminal (16.9344MHz) Crystal oscillator input terminal (16.9344MHz) System clock source selection (0: doubler, 1: external) External clock input/doubler clock output according to CLKS
Pad Type
Schmitt trigger Schmitt trigger Schmitt trigger
Pull Up/Down - - - - - - - - - Down Down - - - - - - - - - - - - - - - - - Down Down
- - - - - -
Schmitt trigger Schmitt trigger
- -
Schmitt trigger Schmitt trigger Schmitt trigger
- - - - - - - - - - - - - -
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S5A1901H02 PIN DESCRIPTION (Continued)
No 71 72 73-76 77 78 79-84 85 86 87-92 93 94 95 96 97 98
Pin Name VDD10 GND10 NC GND11 VDD11 NC GND12 VDD12 NC RESB VCC1 VSS1 VREFI VREF ARI
I/O DP DG - DG DP - DG DP - DI AP AG AO AO AI Digital power +5 V Digital ground
Function
Pad Type - - - - - - - - - - - - - - -
Pull Up/Down - - - - - - - - - - - - - -
Reserved for chip test Digital ground Digital power +5 V Reserved for chip test Digital ground Digital power +5 V Reserved for chip test System reset (active low) Codec analog power +5 V Codec analog ground Codec 2.5V reference to VSS1 Codec 2.25V reference to VSS1 A/D right channel input magnitude centered around VREF should be less than or equal to 1 Vrms A/D left channel input magnitude centered around VREF should be less than or equal to 1 Vrms Codec analog power +5V
99
ALI
AI
-
-
100
NOTES: * DI * * * * * * * DO I/O AI AO DP DG AP
VCC2
Digital Input Digital Output
AP
-
-
Digital Input and Output Analog Input Analog Output Digital Power Digital Ground Analog Power
*
AG
Analog Ground
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S5A1901H02
HARDWARE DESCRIPTION
DSP Core * * * * Up to 33 MIPS 16 bit fixed point High Performance DSP core (SSP1610) 16 x 16 multiplier with 32 bit product 32 bit ALU/accumulator 0.5 m triple metal CMOS technology
Memory * * * * 0.5 Kword data RAM 6 Kword delay RAM for sound field effect 6 Kword program ROM 0.5 Kword parameter ROM for Movie Mode
Built-in A/D and D/A converters * * Stereo 16 bit - A/D converter Stereo 16 bit - D/A converter
Peripheral Interface * * * * * * Hardware configuration (extended to five registers using bit manipulation) Codec and DSIU2 interface DSIU1 interface Delay memory interface Parameter ROM used in Movie Mode interface Host interface
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Extended Hardware Configuration Registers Register Name DSIU1ICR DSIU1OCR DSIU2ICR DSIU2OCR CHIPCR Description Input format control of digital source interface unit 1 Output format control of digital source interface unit 1 Input format control of digital source interface unit 2 Output format control of digital source interface unit 2/ Codec format control Chip Control: DSDO1 clock source selection, Input Source Configuration Selection
General Description of Digital Audio Interface of the S5A1901H02 The digital audio interface of the S5A1901H02 consists of 3 blocks mainly: CIU, DSIU1 and DSIU2. The CIU block is the interface block for the built-in codec. The DSIU1 and DSIU2 blocks are for external ADC and DAC interfaces. The DSIU2 and CIU are mutually exclusive in a sense that only one of two is working. The interface blocks can work either slave or master mode (for DSIU1 output, both modes) depending on wether the S5A1901H02 supplies the bit clocks and LR clocks (master), or DAC (ADC) provides the clocks (slave). For example, the DSIU1 takes the digital audio outputsin master/32 Fs mode, which means that the S5A1901H02 (or DSIU1) provides the bit and the LR clocks to the DAC and the audio data format 32 Fs (32 bit clocks in a LR clock period). When an external ADC or (and) DAC is used, it is strongly recommended to use the clock, CLKO (pin #64), provided by S5A1901H02 as the master clock for clock synchronization.
DSIU2
CIU master (32Fs) 16 bit ADC CODEC master (32Fs) 16 bit DAC
DSIU1
slave (support all formats*)
slave master (support (32Fs, 16bit) all format*)
S5A1901H02
master & slave (support all formats*)
ADC
DAC
ADC
DAC
Figure 4. Digital Audio Interface Formats of the S5A1901H02
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S5A1901H02
Codec Interface The S5A1901H02 has on chip 16 bit stereo ADC and DAC with digital filters and serial interfaces to provide CD quality sound for audio application. The digital A/D decimation filter takes in the encoded signals from - A/D modulator, and outputs 16 bit stereo digital audio data through the serial interface. The D/A interpolation filter takes 16 bit stereo audio data from the serial interface, and outputs one bit signal to the - D/A. The oversampling rate of the digital filter is 128xFs, where Fs can be varied from 4kHz to 48kHz and can be changed on the fly. The serial data interface is running at 32xFs and supports both right justified format and I2S data format. To set input and output formats of codec, see Table and Table . Digital Source Interface Unit 1 (DSIU1) The DSIU1 has a digital serial data input source (DSDI1) and a digital serial data output source (DSDO1). It supports 16/18/20/24 bit data length, and supports right justified, left justified or I2S format in data position. The format of DSIU1 is controlled by a microcontroller through Host Interface Unit (HIU) and Configuration Register Unit (CRU) as in Table 19 and Table . In formats of DSDI1 and DSDO1, only 16 bit data length is supported when the data rate is 32xFs. The DSDO1 can operate either in slave or master mode while DSDI1 operates only in slave mode by Configuration Register Unit (CRU) setting. Note that the MSB is transferred first.
L-ch
DLRCKI1/DLRCKO1 DBCKI1/DBCKO1 RJ/16 bit/64 fs RJ/18 bit/64 fs RJ/20 bit/64 fs RJ/24 bit/64 fs
R-ch
LJ/16 bit/64 fs LJ/18 bit/64 fs LJ/20 bit/64 fs LJ/24 bit/64 fs
IIS/16 bit/64 fs IIS/20 bit/64 fs IIS/18 bit/64 fs IIS/24 bit/64 fs
L-ch = Low, Data is synchronized with the falling edge of DBCKI1/DBCKO1
Figure 5. Data Format in DSIU1
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AUDIO EFFECT PROCESSOR
Digital Source Interface Unit 2 (DSIU2) The DSIU2 has a digital serial data input source (DSDI2) and a digital serial data output source (DSDO2). The DSDI2 operates in slave mode, while the DSDO2 operates in master mode. The format of DSDI2 is same as that of DSDI1. The format of DSDO2 is same as that of built-in codec. The format of DSDO2 supports 16 bit and 32xFs right-justified or IIS format. The format of DSIU2 is controlled by a microcontroller through Host Interface Unit (HIU) and Configuration Register Unit (CRU) as in Table and Table . Note that the MSB is transferred first.
L-ch
DLRCKI2 DBCKI2 RJ/16 bit/64 fs RJ/18 bit/64 fs RJ/20 bit/64 fs RJ/24 bit/64 fs
R-ch
LJ/16 bit/64 fs LJ/18 bit/64 fs LJ/20 bit/64 fs LJ/24 bit/64 fs
IIS/16 bit/64 fs IIS/20 bit/64 fs IIS/18 bit/64 fs IIS/24 bit/64 fs
DLRCKO2 DBCKO2 RJ/16 bit/32 fs IIS/16 bit/32 fs
MSB MSB LSB MSB LSB MSB LSB LSB
Figure 6. Data Format in DSIU2
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S5A1901H02
Host Interface Unit (HIU) The S5A1901H02 receives commands and parameters in serial format from microcontroller through built-in HIU. The data must be in byte unit (8 bit). The host commands are composed of the following three types. * Command Only * * Command followed by Parameter Command followed by Parameter #1 (high byte) followed by Parameter #2 (low byte)
The details on commands used in the S5A1901H02 can be found in Chapter 4. The HIU supports either normal microcontroller interface or I2C bus interface. In normal host interface, the related pins are HCLK (Normal Host Interface Bit Clock), HWEB (Normal Host Interface Write Enable) and HDATA (Normal Host Interface Data In/Out). In I2C bus interface, the related pins are SDA (Serial Data Line), SCL (Serial Clock Line) and SAS (I 2C Bus Interface Programmable Slave Address Selection). One can refer to I2C Bus Specification by Philips. The I2C bus interface in the S5A1901H02 operates in Slave-Transmitter mode. The other function of HIU is the spectrum request function. The spectrum value is sent to microcontroller. The maximum bit clock (HCLK or SCL) is 400kHz. Note that since the chip is being initialized for at least 1ms after reset, commands should be transferred to the chip after 1ms.
1-Byte Operation Write Operation(Command)
2-Byte Operation Write Operation(Command) Processing Operation Write Operation(Data) Processing Operation
HWEB
HCLK
HDATA
MSB
MSB
MSB
From Micom
From Micom
From Micom
Figure 7. Data Format in Normal Host Interface
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AUDIO EFFECT PROCESSOR
Spectrum Request Operation Write Operation HWEB Read Operation
Other Write Operation
HCLK
HDATA
MSB
MSB
MSB
From Micom
From Chip
From Micom
Figure 8. Data Format in Normal Host Interface-Spectrum Request I2C Bus Interface The S5A1901H02 can be controlled by a microcontroller via the 2-line I2C bus, SDA (Serial Data Line) and SCL (Serial Clock Line). Both lines must be connected to a positive supply via pull-up resistor. Data transfer may be initiated only when the bus is not busy. When the bus is free, both lines are high. The data on the SDA line must be stable during the high period of clock, SCL. When the SCL is low, the SDA can change. Every byte transferred through the SDA line must contain 8 bits including programmable slave address and read/write direction control bit. Each byte must be followed by acknowledge bit which is sent back to the microcontroller by the S5A1901H02 by pulling down the SDA line. The MSB is transferred first. The setup and hold time on the SCL and SDA lines can be found in I2C Specification by Philips. * I2C bus interface start and stop condition
The start condition is high to low transition of the SDA line while the SCL is high. The stop condition is low to high transition of the SDA line while SCL is high.
SDA
SCL Data Valid Change of Data Allowed
SDA
SCL S Start Condition P Stop Condition
Figure 9. Data Validity and Start/Stop Condition in I2C Bus
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S5A1901H02
*
I2C Bus Interface Acknowledge
The acknowledge related clock pulse is generated by a microcontroller. The transmitter releases the SDA line (high) during the acknowledge clock pulse. The receiver must pull down the SDA line during the acknowledge clock pulse so that it remains stable low during the high period of this clock pulse. The slave-transmitter generates negative acknowledge when read operation processes. The negative acknowledge is generated by a master (microcontroller). * I2C Bus Interface Slave Address Selection Selected Slave Address (Hex) Pin Name Status Low SAS High Write Address 80 82 Read Address 81 83
*
I2C Bus Interface Specification
Chip Address
MSB LSB MSB
Function Address
LSB MSB
DATA
LSB
S
1
0
0
0
0
0
A0
W
A
A
A
P
SCL
SDA S
10000000
P
Figure 10. I2C Bus Interface Format-Write Operation (SAS = 0)
Chip Address
MSB LSB MSB
Function Address
LSB MSB
DATA
LSB
S
1
0
0
0
0
0
A0
R
A
A
N/ A
P
SCL
SDA S
10000001
P
(S: Start Condition P: Stop Condition R: Read Operation W: Write Operation A:Acknowledge N/A: Negative Acknowledge)
Figure 11. I2C Bus Interface Format-Read Operation (SAS = 0)
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AUDIO EFFECT PROCESSOR
System Clock In the S5A1901H02, there are two ways to supply the system clock, * Using Clock Doubler
The CLKS should be set to LOW and X-tal oscillator of 16.9344MHz is connected to XI and XO pins. Then, the clock doubler doubles 16.9344MHz to 33.8688MHz and outputs to MCLK. * Using External Clock Source
The CLKS should be set to HIGH. In this case, the MCLK pin is the input which is the system clock of 33.8688MHz.
Reset The S5A1901H02 provides hardware reset and software reset. In hardware reset using RESB pin, the reset signal has to be kept for L/R one cycle pulse width (approx. 22.67s) for stable initialization of built-in codec. In the software reset (command code: 0x00) through HIU, system initialization is internally processed.
Power Down The system power down mode set by host command through HIU disables all hardware macro blocks in the S5A1901H02, i.e., DSP, delay RAM, data RAM, program ROM, glue logic and codec. Every host command can wake-up the system power down mode.
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FUNCTIONAL DESCRIPTION
Bypass Mode In bypass mode, the input is bypassed to the output with the control of volume, balance and tone.
Stereo Emulation Mode I, II These modes emulate mono input signal to stereo signal. The block diagram realizing these modes is shown in Figure . The Stereo Emulation Mode I and II are different in the strength of effect. The Stereo Emulation Mode II produces more stereo effect than Stereo Emulation Mode I.
Lin = Rin
Lout
Delay
+
Filter
Rout
Figure 12. Block Diagram for Stereo Emulation Modes Super Woofer Mode I, II, III Super Woofer modes highly emphasize very low frequency component of input signal, and then, add echo effect. The block diagram realizing these modes is shown in Figure . The Super Woofer Mode I, II and III are different in the strength of the effect. The effect becomes stronger from Super Woofer I to Super Woofer III.
Lin
Prefilter
+
Postfilter Delay Buffer
+
Lout
Rin
Prefilter
+
Rout
Figure 13. Block Diagram for Super Woofer Modes
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Hall Mode I, II and Stage Mode Hall modes and stage mode produce effects that one feels as if he or she is in a hall or a stage respectively. The block diagram realizing these modes is shown in Figure . The Hall Mode I and II are different in the hall size which one can feel. The Hall Mode II produces the effect of a larger hall than that of Hall Mode I.
Lin
+
Filter Delay Buffer
+
Lout
Rin
Figure 14. Block Diagram for Hall and Stage Modes Arena Mode I, II
+
Rout
Arena modes produce effects that one feels as if he or she is in an arena. The block diagram realizing these modes is shown in Figure . The Arena Mode I and II are different in the arena size which one can feel. The Arena Mode I produces the effect of wider arena than that of Arena Mode II.
Lin
+
Filter
Delay Delay
+
Lout
Rin
+
Rout
Figure 15. Block Diagram for Arena Mode I, II
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S5A1901H02
News/Drama Mode This mode enhances high frequency component of signal to improve the speech recognizability for news or drama program.
Karaoke Mode I, II The Karaoke modes receive inputs from both a microphone and an audio source. In Karaoke Mode I, the microphone input is echoed by the echo filter 1 and the audio source input is effected with the stage mode. When the vocal canceller is selected, the audio source whose vocal component is cancelled is bypassed without stage effect. In Karaoke Mode II, the microphone input is echoed by the echo filter 2 and the audio source input is bypassed.
Voice
Mic Echo I Equalizer Stage Effect
Music Vocal Canceller
Karaoke Mode I
Voice
Mic Echo II Equalizer
Vocal Canceller Music
Karaoke Mode II
Figure 16. Karaoke Mode I, II In Mic echo filter 1, the delay gains remain large and they are shortly decayed as time goes by. Thus, one can feel plenty of echo while there is little aliasing between echos and original sound. The Mic echo filter 2 has a similar structure to that of Hall mode. The effect is not stronger than that of Mic echo filter 1, but it produces a widely spread echo which is very impressive.
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User Defined Mode The User Defined Mode enables one to design a new sound effect mode by setting the parameters of existing filter structure. The block diagram of this filter structure is shown in Figure . One can set these parameters by sending host commands corresponding to each parameters. The commands used for this mode are listed in Chapter 4. The command codes from 0x49 to 0x71 are assigned to User Defined Mode. The usage of individual parameter in Figure is as follows: * The gain parameters, G0 and G1, are used to control left and right input gains respectively. * The parameters, BL0, BL1 and AL1, are coefficients of the IIR filter used for left prefilter. The parameters, BR0, BR1 and AR1, are coefficients of the IIR filter used for right prefilter. The parameters, BD0, BD1 and AD1 are coefficients of the IIR filter used for postfilter. The structures of all three filters are realized by the first order IIR. The zero of the transfer function of each filter is - BX1 / BX0 and the pole is - AX1, where X is L or R or D. The parameters, G2, G3 and G4, are left term gain, right term gain and feed-back term gain respectively. The parameters, G5 to G11, are gains of delayed signals in the left channel. The parameters, G14 to G20, are gains of delayed signals in the right channel. The parameters, G12 and G21, are gains of effected output signals. The parameters, G13 and G22, are gains of directed output signals. The parameter, T0, is the pointer address of the feed-back signal in the delay memory. The parameter, Tc, is the pointer address of the current input signal. The parameters, T1 to T7, are pointers designating addresses of the 7 different delayed signals. Note that the pointer address is same as the amount of delay. Thus, T0 to T7 values can be simply determined as the amount of delay which one wants to set.
* *
*
G4 BL0 G0 AL1
BD0
AD0
Left Prefilter
BL1 BR0
G2
+ BD1
Postfilter
Tc
Delay Line Buffer
T0
T 1 T 2 T 3 T4 T5 T6 T 7
AR1
G1
Right Prefilter
BR1
G3
G5 G6 G7 G8 G9 G10 G11 G14 G15 G16 G17 G18 G19 G20
G13
+
G12
+
L
+
G21
+ G22
R
Figure 17. Block Diagram for User Defined Mode
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Movie Mode I, II The Movie Mode I and II create 3-dimensional sound images from 2-channel stereo input signals. The Movie ModeI enhances stereo images dynamically using the Samsung proprietary TLA (Table Lookup Algorithm) method. One perceives as if he or she is in the live stage. The Movie Mode II uses a sound source relocalization technique based on Head Related Transfer Function (HRTF). Only using two front speakers, one can perceive as sound coming from various directions.
Graphic Equalizer The S5A1901H02 provides the graphic equalizer having following features. * 3/5/7-band graphic equalizer * * 5/7-band spectrum analyzer display 12dB adjustable range
The 3-band graphic equalizer can be used as a simple digital tone control (as bass and treble control). Center Frequencies of Equalizer Bands (Hz) Band Band0 Band1 Band2 Band3 Band4 Band5 Band6 3-Band Mode 63 1K 16 K - - - - 5-Band Mode 100 300 1K 3K 10 K - - 7-Band Mode 63 160 400 1K 2.5 K 6.4 K 16 K
The gain control of each band uses an attenuation table containing attenuation values, which has the size of 25 to implement 12dB with 1dB step control
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Attenuation
0 dB +12 dB
Maximum tone Vc+Tm
Current volume scale Vc Volume range +-12dB@1dB step Minimum tone Vc+Tm 90 dB MUTE (inf dB) -12 dB
Figure 18. Dynamic Range of Each Control Band Gain Table for Tone Level Control Index 0 1 2 3 4 5 6 7 8 9 10 11 12 Gain Value (Hex) 0809 0904 0a1e 0b5a 0cbd 0e4b 1009 11fe 1430 16a7 196b 1c85 2000 Gain Scale (dB) - 12 - 11 - 10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 Index 13 14 15 16 17 18 19 20 21 22 23 24 Gain Value (Hex) 23e7 2849 2d33 32b7 38e7 3fd9 47a3 5061 5a30 6531 718a 7f64 Gain Scale (dB) 1 2 3 4 5 6 7 8 9 10 11 12
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AUDIO EFFECT PROCESSOR
S5A1901H02
Spectrum Analyzer The spectrum analyzer displays the power of each equalizer band output. The band number in spectrum analyzer is identical to that in graphic equalizer except for the 3-band equalizer mode. In this case, the spectrum analyzer follows 7-band equalizer mode in spite of the 3-band equalizer mode being selected. The 16 bit analyzer outputs are transformed to generate a byte value (256 levels), which can be applied to an external LCD or other display devices. At each input sample, only one band output power is calculated in every sampling period, because it is not necessary to display all band power at each sampling period. (At 44.1kHz sampling frequency, the period is only 0.0227 msec)
Vocal Canceller The structure of vocal canceller function used in the S5A1901H02 is given in Figure .
Left input
+
Band Stop Filter
-
Left output
Right input
Figure 19. Structure of Vocal Canceller
+
Right output
This structure is based on the fact that the vocal component in music sound is center channel component (i.e., mono). Thus, subtracting left signal from right signal, the signal in the low line from above diagram has no vocal component. However, there are lots of loss in other signal components. For instance, since drum beat is usually mono, it also disappears after the vocal cancellation. The process in the upper line compensates this loss of some components. The added two signal is filtered by a band stop filter in which the lower and upper cutoff frequencies are 120Hz and 10kHz respectively. Thus, the stereo components below 120Hz and above 10kHz are emphasized, whereas the vocal components between cutoff frequencies are eliminated. To obtain the left and the right signals, the filtered signal is subtracted from the lower part of signals to obtain the left signal, and is added to the lower part of signal to obtain the right signal.
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Loudness Control The loudness control compensates human aural insensitivity to low and high frequency components of low volume level. Loudness control increases the tone levels of low (lower than 100Hz) and high frequency (higher than 10kHz) signals according to the actual volume setting. When loudness control is on, the current equalizer mode is stored and does not work until loudness control is turned off.
Gain
Gain
f
f
MIN Gain VOLUME
MAX Gain
f
f
Figure 20. Loudness gain according to the actual volume setting
Figure 21. Loudness compensated level with respect to volume level
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S5A1901H02
Volume Control Volume control uses an attenuation table containing attenuation values, which has the size of 110 to implement 0dB to -dB attenuation.
Attenuation 0 dB Maximum volume 35 dB 1.0 dB /step 110 steps in total 70 dB 90 dB MUTE (inf dB) 5 dB /step 0.5 dB /step Step size
Figure 22. Dynamic Range for Volume Contro l Volume Gain Table Index 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Gain Value (Hex) 7fff 78d6 7214 6bb2 65ac 5ffc 5a9d 558c 50c3 4c3e 47fa 43f4 4026 3c90 392c 35fa Gain Scale (dB) 0 - 0.5 - 1.0 - 1.5 - 2.0 - 2.5 - 3.0 - 3.5 - 4.0 - 4.5 - 5.0 - 5.5 - 6.0 - 6.5 - 7.0 - 7.5 Index 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 Gain Value (Hex) 2ae0 287a 2636 2413 220e 2026 1e5a 1ca7 1b0d 198a 181c 16c3 157d 1449 1326 1214 Gain Scale (dB) - 9.5 - 10.0 - 10.5 - 11.0 - 11.5 - 12.0 - 12.5 - 13.0 - 13.5 - 14.0 - 14.5 - 15.0 - 15.5 - 16.0 - 16.5 - 17.0
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Volume Gain Table (Continued) Index 16 17 18 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 Gain Value (Hex) 32f5 301b 2d6a 0e5c 0d8e 0ccc 0c15 0b68 0ac5 0a2a 0999 090f 088e 0813 079f 0732 06cb 066a 060e 05b7 0565 0518 04cf 048a 0449 040c 03d2 039b 0367 0337 0309 02dd Gain Scale (dB) - 8.0 - 8.5 - 9.0 - 19.0 - 19.5 - 20.0 - 20.5 - 21.0 - 21.5 - 22.0 - 22.5 - 23.0 - 23.5 - 24.0 - 24.5 - 25.0 - 25.5 - 26.0 - 26.5 - 27.0 - 27.5 - 28.0 - 28.5 - 29.0 - 29.5 - 30.0 - 30.5 - 31.0 - 31.5 - 32.0 - 32.5 - 33.0 Index 35 36 37 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 Gain Value (Hex) 1111 101d 0f36 016f 0147 0124 0104 00e7 00ce 00b8 00a4 0092 0082 0074 0067 005c 0052 0049 0041 003a 0033 002e 0029 0024 0020 001d 001a 0017 0014 0012 0010 000e Gain Scale (dB) - 17.5 - 18.0 - 18.5 - 39.0 - 40.0 - 41.0 -42.0 - 43.0 - 44.0 - 45.0 - 46.0 - 47.0 - 48.0 - 49.0 - 50.0 - 51.0 - 52.0 - 53.0 - 54.0 - 55.0 - 56.0 - 57.0 - 58.0 - 59.0 - 60.0 - 61.0 - 62.0 - 63.0 - 64.0 - 65.0 - 66.0 - 67.0
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AUDIO EFFECT PROCESSOR
S5A1901H02
Volume Gain Table (Continued) Index 67 68 69 70 71 72 73 Gain Value (Hex) 02b4 028d 0269 0246 0207 01ce 019c Gain Scale (dB) - 33.5 - 34.0 - 34.5 - 35.0 - 36.0 - 37.0 - 38.0 Index 103 104 105 106 107 108 109 Gain Value (Hex) 000d 000b 000a 0005 0003 0001 0000 Gain Scale (dB) - 68.0 - 69.0 - 70.0 - 75.0 - 80.0 - 85.0 -
Balance Control When balance control selects the left (right) channel, the right (left) channel diminishes. Balance control uses the same table that is used for volume control as in Table , which performs 0 dB to - dB (mute) attenuation by 1dB per step.
Attenuation
0 dB
Current volume scale Vc
Output Volume range 90 dB MUTE (inf dB)
Figure 23. Dynamic Range for Balance Control
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Input/Output Configurations The S5A1901H02 can receive one analog input from the built-in ADC and one digital input from DSDI1, or two digital inputs from DSDI1 and DSDI2 simultaneously. It can also send output to the built-in DAC, DSDO1 and DSDO2. As described in Chapter 4, the S5A1901H02 has Mixing, Input/Output source selection and Bypass On-Chip Function to support a various Input/Output source configurations as described below.
*
Input/Output Configuration 1
Built-in DAC DSDO2
DSDI1
Sound Effect
Graphic Equalizer
Volume/ Balance
DSDO1
Figure 24. Block Diagram of Input/Output Configuration For this configuration, one should set Mixing and Bypass On-Chip Function to be turned off while DSDI1 is enabled by using Chip Control Command as described in Chapter 4. The digital input from DSDI1 can be processed by one of sound effect modes. In output side, the signal effected by one of sound modes is passed to DSDO1, and the output after graphic equalizer followed by volume and balance control is passed to the built-in DAC and DSDO2. To obtain Configuration 1, one can send host commands from microcontroller in the order of the commands listed in Table 8 Host Commands for Input/Output Configuration 1. Command Code (Hex) 34 2a 2c 2d Parameter c1 (e1) - - - Description Select DSDI1 (When DSDO1 uses internal clock) Bypass On-Chip Function: Off Mixing Function: Off Output Channel Selection: Normal
If one selects Output Channel Selection (command code: 0x2e) to be inverted, then two output connections are switched.
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AUDIO EFFECT PROCESSOR
S5A1901H02
*
Input/Output Configuration 2
Built-in ADC DSDO1 DSDI2
DSDI1
Sound Effect
Graphic Equalizer
Volume/ Balance
Built-in DAC DSDO2
Figure 25. Block Diagram of Input/Output Configuration 2 For this configuration, one should set Mixing to be turned off and Bypass On-Chip Function to be turned on. In this configuration, the S5A1901H02 receives two digital input signals through DSDI1 and DSDI2, or one analog and one digital signals through the built-in ADC and DSDI1 respectively according to input channel configuration using Chip Control Command as described in Chapter 4. With this selection, the input from the built-in ADC or DSDI2 is bypassed to DSDO1 while the input from DSDI1 is processed by selected functions of the S5A1901H02. Thus, it permits that other process, which the S5A1901H02 does not provide, be applied to the digital signal from DSDO1. Also, this result can be an input to DSDI1 for further processing by functions of the S5A1901H02 as shown in Figure . In this configuration, the Output Channel Selection cannot be inverted. To obtain Configuration 2, one can send host commands from microcontroller in the order of commands listed in Table 9. Host Commands for Input/Output Configuration 2 Command Code (Hex) 34 29 2c Parameter c3 (e3) c4 (e4) - - Description Select built-in ADC & DSDI1 (When DSDO1 uses internal clock) Select DSDI1 & DSDI2 (When DSDO1 uses internal clock) Bypass On-Chip Function: On Mixing Function: Off
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*
Input/Output Configuration 3
Built-in DAC DSDO2 Built-in ADC Sound Effect DSDI2 DSDO1 Graphic Equalizer Volume/ Balance
Figure 26. Block Diagram of Input/Output Configuration 3 This configuration is exactly same as Configuration 1 except for input source. For this configuration, one should set Mixing and Bypass On-Chip Function to be turned off while the built-in ADC or DSDI2 is enabled. To obtain Configuration 3, one can send host commands from microcontroller in the order of the commands listed in Table 10.
Host Commands for Input/Output Configuration 3 Command Code (Hex) 34 Parameter c0 (e0) c2 (e2) 2a 2c - - Description Select built-in ADC (When DSDO1 uses internal clock) Select DSDI2 (When DSDO1 uses internal clock) Bypass On-Chip Function: Off Mixing Function: Off
If one selects Output Channel Selection (command code: 0x2e) to be inverted, then two output connections are switched.
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AUDIO EFFECT PROCESSOR
S5A1901H02
*
Input/Output Configuration 4
Built-in DAC DSDI1 DSDO2
+
Built-in ADC DSDI2
Sound Effect
Graphic Equalizer
Volume/Balance
DSDO1
Figure 27. Block Diagram of Input/Output Configuration 4 For this configuration, one should set Mixing to be turned on and Bypass On-Chip Function to be turned off. Input signals from different sources can be mixed with controllable gains. After mixed, the flow is identical to Configuration 1 and 3. To obtain Configuration 4, one can send host commands from microcontroller in the order of the commands listed in Table 1.
Host Commands for Input/Output Configuration 4 Command Code (Hex) 34 Parameter c3 (e3) c4 (e4) 2a 2b 2d - - - Description Select built-in ADC & DSDI1 (When DSDO1 uses internal clock) Select DSDI1 & DSDI2 (When DSDO1 uses internal clock) Bypass On-Chip Function: Off Mixing Function: On Output Channel Selection: Normal
If one selects Output Channel Selection (command code: 0x2e) to be inverted, then two output connections are switched.
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*
Input/Output Configuration 5
Built-in ADC Mic Echo DSDI2
Built-in DAC DSDO2
+
Vocal canceller DSDI1 Stage Effect
Graphic Equalizer
Volume/ Balance
DSDO1
Figure 28. Block Diagram of Input/Output Configuration 5 This configuration is for Karaoke Mode I. To have this configuration, one should set Mixing and Bypass On-Chip Function to be turned off. According to input channel source setting, one of inputs from the built-in ADC or DSDI2 is processed by mic-echo, and the other input from DSDI1 is processed by stage effect mode or by vocal canceller. After mixed, the result is bypassed to DSDO1. This signal is also passed to the built-in DAC and DSDO2 after processed by graphic equalizer, volume and balance control. To obtain Configuration 5, one can send host commands from microcontroller in the order of the commands listed in Table 2.
Host Commands for Input/Output Configuration 5 Command Code (Hex) 34 11 16 23 (24) 2a 2c 2d Parameter c3 (e3) c4 (e4) - - - - - - Description Select built-in ADC & DSDI1 (When DSDO1 uses internal clock) Select DSDI1 & DSDI2 (When DSDO1 uses internal clock) Select Karaoke Mode I Source Selection in Karaoke Mode I: Normal Vocal Canceller: On (Off) Bypass On-Chip Function: Off Mixing Function: Off Output Channel Selection: Normal
If one selects Output Channel Selection (command code: 0x2e) to be inverted, then two output connections are switched.
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*
Input/Output Configuration 6
Built-in DAC DSDI1 Mic Echo DSDO2
+
Vocal canceller Built-in ADC
Graphic Equalizer
Volume/ Balance
DSDO1 DSDI2 Stage Effect
Block Diagram of Input/Output Configuration 6 This configuration is also for Karaoke mode I as shown in Configuration 5. The difference between them is that sources for mic-echo and stage effect mode are exchanged. To obtain this configuration, one should set Input Source Selection in Karaoke I to be inverted and other switches (Mixing, Bypass On-Chip Function) to be turned off. To obtain Configuration 6, one can send host commands from microcontroller in the order of the commands listed in Table 3.
Host Commands for Input/Output Configuration Command Code (Hex) 34 Parameter c3 (e3) c4 (e4) 11 17 23 (24) 2a 2c 2d - - - - - - Description Select built-in ADC & DSDI1 (When DSDO1 uses internal clock) Select DSDI1 & DSDI2 (When DSDO1 uses internal clock) Select Karaoke Mode I Source Selection in Karaoke Mode I: Inversion Vocal Canceller: On (Off) Bypass On-Chip Function: Off Mixing Function: Off Output Channel Selection: Normal
If one selects Output Channel Selection (command code: 0x2e) to be inverted, then two output connections are switched. Default Setting in S5A1901H02 Functions Sound Mode Graphic Equalizer Mode Spectrum Analyzer Tone Level Vocal Canceller Loudness Selection Bypass 7-band 7-band 0x0c Off Off 0 dB Remark
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Functions Bypass On-Chip Function
Selection Off Off
Output Channel Selection Input Gain (ADC/DSDI2) Input Gain (DSDI1) 0x7fff 0x46 DSIU1ICR [7:0] DSIU1OCR [7:0] DSIU2ICR [7:0] DSIU2OCR [7:0] CHIPCR [7:0] 0x00 0x00 0x00 0x00 0xc0 - 0x3fff 6 dB - 6 dB 0 dB
AUDIO EFFECT PROCESSOR
S5A1901H02
COMMAND SET
The S5A1902 receives data from and sends data to microcontroller through its HIU (Host Interface Unit) in the length of byte. It provides I2C bus interface as well as normal microcontroller interface. To design and program a microcontroller, one may refer to the specification of host interface described in Chapter 2. The commands used in the S5A1901H02 are classified into the three types as follows: * * * Type1: Command Only (1 Byte Command) Type2: Command followed by Parameter (2 Byte Command) Type3: Command followed by Parameter 1 and Parameter 2 (3 Byte Command)
Note that all data regardless of types must be sent to the S5A1901H02 in the length of byte. In type3, the high byte is followed by the low byte. The command class contained in each type are listed in the following table. (see also Table )
Classification of Command Type System Control Sound Mode Selection Source Selection in Karaoke I Graphic Equalizer Mode Selection Band Spectrum Request TYPE1 Vocal Canceller Loudness Mute/Release Bypass On-Chip Function Mixing Output Channel Selection Digital Data Format & Input Configuration Volume TYPE2 Balance Mic-echo Scale Equalizer Tone Level Control Input Gain Control TYPE3 Output Gain Control Parameters for User Defined Mode Class
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COMMAND SET DESCRIPTION
*
Format
Command Code (Hex)
Command Name Reset
Description
2. SYSTEM POWER DOWN * Command for System Power Down Command Code (Hex) 03 Description System Power Down
AUDIO EFFECT PROCESSOR
S5A1901H02
3. SOUND MODE SELECTION * Format
Commands for Sound Mode Selection Command Code (Hex) 05 06 07 08 09 0a 0b 0c 0d Command Name Bypass Stereo Emulation I Stereo Emulation II Super Woofer I Super Woofer II Super Woofer III Hall I Hall II Stage Command Code (Hex) 0e 0f 10 11 12 13 14 15 Command Name Arena I Arena II News/Drama Karaoke I Karaoke II User Defined Mode Movie I Movie II
Description The S5A1901H02 presents various sound effect and Movie modes as listed above. For detailed description on each mode, refer to "Functional Description" in Chapter 3.
4. SOURCE SELECTION IN KARAOKE MODE I * Format
Commands for Source Selection in Karaoke Mode I Command Code (Hex) 16 17 Command Name Normal Inversion
Description In Karaoke mode I, two input sources are processed by mic-echo and stage effect mode respectively, and then, they are mixed. In normal selection, the signal coming from built-in ADC or DSDI2 is the input for mic-echo, and the signal coming from DSDI1 is the input for stage effect mode. In inversion selection, the signal coming from built-in ADC or DSDI2 is the input for stage mode, and the signal coming from DSDI1 is the input for mic-echo Input Source Source Selection Normal Inversion Mic-Echo ADC or DSDI2 DSDI1 Stage Effect DSDI1 ADC or DSDI2
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5. GRAPHIC EQUALIZER MODE SELECTION * Format
Commands for Graphic Equalizer Mode Selection Command Code (Hex) 18 19 1a 1b Command Name 3-band Tone Control 5-band Tone Control 7-band Tone Control Defeat
Description The S5A1901H02 provides 3, 5 or 7-band equalizer mode and tone control. For detailed description on graphic equalizer and tone control, refer to "Functional Description" in Chapter 3. Note that if loudness function is selected, then any equalizer mode cannot be selected. After an equalizer mode is selected, tone level of each band is controlled by Tone Control Command. To select an equalizer mode, the loudness function should be turned off
6. SPECTRUM VALUE REQUEST * Format
Commands for Spectrum Value Request Command Code (Hex) 1c 1d 1e 1f 20 21 22 Command Name Band0 in 5/7-band equalizer mode Band1 in 5/7-band equalizer mode Band2 in 5/7-band equalizer mode Band3 in 5/7-band equalizer mode Band4 in 5/7-band equalizer mode Band5 in 7-band equalizer mode Band6 in 7-band equalizer mode
Description The S5A1901H02 provides spectrum data corresponding to 5/7-band equalizer mode to host (microcontroller). The spectrum value of each band is calculated in every sampling period. When the spectrum value of a specific band is requested by host, the one-word spectrum value (16 bit) is transformed to a byte value (8 bit) through built-in spectrum interface unit to transfer to host. Requested Spectrum Value Spectrum [Band [i]] [15:0] Transferred Spectrum Value Spectrum [Band [i]] [11:4] 27 Condition Spectrum [Band [i]] < 2 12 Spectrum [Band [i]] > 2 11
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AUDIO EFFECT PROCESSOR
7. VOCAL CANCELLER Format Commands for Vocal Canceller Command Code (Hex) 23 Vocal Canceller On Vocal Canceller Off The vocal canceller function is used to decrease the level of vocal component from a music source. It is useful function for Karaoke modes to distinct the vocal component from a microphone and the vocal component from
8. LOUDNESS * Commands for Loudness Command Code (Hex) 25 Loudness On Loudness Off Description one can listen a sound evenly for all frequency ranges. Note that while the loudness is on, the tone level control does not work because it uses specified tone levels. The changed tone values are updated after the loudness is
9. MUTE/RELEASE * Commands for Mute and Release Command Code (Hex) 27 Mute Release Description dB. Selecting release, the volume level before mute is recovered. By changvolume level before mute, but updated by selected volume level.
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AUDIO EFFECT PROCESSOR
10. BYPASS ON-CHIP FUNCTION * Format
Commands for Bypass On-Chip Function Command Code (Hex) 29 2a Command Name Selection No Selection
Description With the selection of this function, the input from built-in ADC or DSDI2 is bypassed to DSDO1 while the input from DSDI1 is processed by functions of the S5A1901H02. Thus, it permits that other functions, which are not available in the S5A1901H02, can be applied to the digital output from DSDO1. This result can also be an input to DSDI1 for further processing by functions of the S5A1901H02. Note that this function cannot be selected in Karaoke modes since these modes require two input sources. If the mixing function is selected previously, it is automatically turned off with the selection of Bypass On-Chip Function. * In Karaoke modes, Bypass On-Chip Function cannot be selected * When Bypass On-Chip Function is selected, the Mixing is automatically turned off if it is on.
ADC DSDO1 DSDI2
Off-Chip Other Functions (e.g. Prologic )
DAC DSDI1 On-Chip Function DSDO2
Figure 29. System Block Diagram when Bypass On-Chip Function is Selected
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AUDIO EFFECT PROCESSOR
S5A1901H02
11. MIXING * Format
Commands for Mixing Command Code (Hex) 2b 2c Command Name Mixing On Mixing Off
Description This function is to mix two inputs with appropriate mixing gains using input gain control commands, and the result is processed by functions of the S5A1901H02. After mixed, the result is the input for a sound mode, and thus, the mixing function cannot be selected in Karaoke modes. If Bypass On-Chip Function is selected previously, it is automatically turned off with the selection of mixing function. * In Karaoke modes, the mixing function cannot be selected * When the mixing function is selected, the Bypass On-Chip Function is automatically turned off if it is on.
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S5A1901H02
12. OUTPUT CHANNEL INVERSION Format Commands for Output Channel Inversion Command Code (Hex) Command Name Normal 2e In normal selection of output channel, the output of a sound mode is passed to DSDO1 for recording before processed by equalizer, volume and balance. After further processed by equalizer, volume and balance, this result is switched. Note that this function cannot be selected if Bypass On-Chip Function is selected already. *The output channel cannot be inverted if the Bypass On-Chip Function is selected.
Output Channel Selection = Normal
Sound Mode
Equalizer/ Tone Control
Volume/ Balance Control
DAC/ DSDO2
DSDO1
Output Channel Selection = Inversion
Sound Mode
Equalizer/ Tone Control
Volume/ Balance Control
DSDO1
DAC/ DSDO2
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S5A1901H02
13. DSIU1 INPUT FORMAT * Format
Command for DSIU1 Input Format Command Code (Hex) 30 DSIU1ICR [7:0] Command Name DSIU1 Input Format
Description The S5A1901H02 supports various input and output digital formats. After the command, desired format can be set using DSIU1ICR [7:0]. DSIU1ICR[7:0] Register Setting for DSIU1 Input Format [7:0] [7] Value 0 1 [6] 0 1 00 [5:4] 01 10 11 00 [3:2] 01 10 11 00 01 [1:0] 10 11 DLRCKI1 is low for L-ch DLRCKI1 is high for L-ch DSDI1 is synchronized with falling edge of DBCKI1 DSDI1 is synchronized with rising edge of DBCKI1 32 Fs 48 Fs 64 Fs Reserved 16 bit 18 bit 20 bit 24 bit I2S Reserved Right Justified Left Justified DSDI1 Data Position DSDI1 Data Length DSDI1 Serial Data Fs Description Related Pin DLRCKI1 (LR Clock) DBCKI1 (Bit Clock)
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14. DSIU1 OUTPUT FORMAT * Format
Command for DSIU1 Output Format Command Code (Hex) 31 DSIU1OCR [7:0] Command Name DSIU1 Output Format
Description The S5A1901H02 supports various input and output digital formats. After the command, desired format can be set using DSIU1OCR [7:0]. DSIU1OCR[7:0] Register Setting for DSIU1 Output Format [7:0] [7] Value 0 1 [6] 0 1 00 [5:4] 01 10 11 00 [3:2] 01 10 11 00 [1:0] 01 10 11 DLRCKO1 is low for L-ch DLRCKO1 is high for L-ch DSDO1 is synchronized with falling edge of DBCKO1 DSDO1 is synchronized with rising edge of DBCKO1 32 Fs 48 Fs 64 Fs Reserved 16 bit 18 bit 20 bit 24 bit I 2S Reserved Right Justified Left Justified DSDO1 Data Position DSDO1 Data Length DSDO1 Serial Data Fs Description Related Pin DLRCKO1 (LR Clock) DBCKO1 (Bit Clock)
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S5A1901H02
15. DSIU2 INPUT FORMAT * Format
Command for DSIU2 Input Format Command Code (Hex) 32 DSIU2ICR [7:0] Command Name DSIU2 Input Format
Description The S5A1901H02 supports various input and output digital formats. After the command, desired format can be set using DSIU2ICR [7:0]. DSIU2ICR[7:0] Register Setting for DSIU2 Input Format [7:0] [7] Value 0 1 [6] 0 1 00 [5:4] 01 10 11 00 01 [3:2] 10 11 00 [1:0] 01 10 11 DLRCKI2 is low for L-ch DLRCKI2 is high for L-ch DSDI2 is synchronized with falling edge of DBCKI2 DSDI2 is synchronized with rising edge of DBCKI2 32 Fs 48 Fs 64 Fs Reserved 16 bit 18 bit 20 bit 24 bit I 2S Reserved Right Justified Left Justified DSDI2 Data Position DSDI2 Data Length DSDI2 Serial Data Fs Description Related Pin DLRCKI2 (LR Clock) DBCKI2 (Bit Clock)
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16. DSIU2 OUTPUT FORMAT * Format
Command for DSIU2 Output Format Command Code (Hex) 33 DSIU2OCR [7:0] Command Name DSIU2 Output Format
Description The data length and bit rate for DSDO2 are fixed to 16 bit and 32xFs respectively. Note that the data position for DSDO2 supports IIS or right justified. The data position for built-in ADC and DAC also follows that of DSDO2. After the command, desired format can be set using DSIU2OCR [7:0]. DSIU2OCR[7:0] Register Setting for DSIU2 Output Format [7:0] [7:3] [2] Value 00000 0 1 [1] 0 1 0 [0] 1 Reserved DLRCKO2 is low for L-ch DLRCKO2 is high for L-ch DSDO2 is synchronized with falling edge of DBCKO2 DSDO2 is synchronized with rising edge of DBCKO2 I2S Right Justified Description Related Pin Reserved DLRCKO2 (LR Clock) DBCKO2 (Bit Clock) Codec In/Out, DSDO2 Data Position
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S5A1901H02
*
Format
Command Code (Hex) 34 Description DSDO1 using CHIPCR [7:0].
CHIPCR [7:0]
CHIPCR[7:0] Register Setting for Input Source Selection [7:0] [7] [6] [5] [4:3] ADC enable DSIU1 enable 010 [2:0] 011 ADC & DSIU1 enable DSIU1 & DSIU2 enable 101-111 Input Source Configurations External Internal Reserved Value `1 `1 Reserved Reserved DLRCKO1/DBCKO1 Clock Source Description
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AUDIO EFFECT PROCESSOR
18. VOLUME CONTROL Format Command for Volume Control Volume_index [7:0] Command Name Volume Control
The S5A1901H02 provides 110 levels in volume control. The desired volume level is invoked by selecting its index using incoming byte, Volume_index [7:0]. The index of the highest volume level corresponds to 0x00 (0dB attenua- * Minimum volume index 0x6d corresponds to dB attenuation Maximum volume index 0x00 corresponds to 0dB attenuation
19. BALANCE CONTROL Format Command for Balance Control Balance_index [7:0] Command Name Balance Control
The MSB of Balance_control [7:0] represents balance left if it is 0 and balance right if it is 1. The volume index used in volume control is also used for balance control, i.e., 0x00 to 0x6d as follows: For balance left, Balance_control [7:0] has the range of 0x00 (equal balance) to 0x6d (max balance) * In balance left (right), the volume level of the left (right) channel is kept, whereas the volume of the right (left) channel is attenuated by the scale corresponding to Balance_index [7:0].
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AUDIO EFFECT PROCESSOR
S5A1901H02
20. TONE CONTROL * Format
Commands for Tone Control Command Code (Hex) 38 39 3a 3b 3c 3d 3e [7:0] Tone_index Command Name Band0 Tone Value in 3/5/7-band equalizer mode Band1 Tone Value in 3/5/7-band equalizer mode Band2 Tone Value in 3/5/7-band equalizer mode Band3 Tone Value in 5/7-band equalizer mode Band4 Tone Value in 5/7-band equalizer mode Band5 Tone Value in 7-band equalizer mode Band6 Tone Value in 7-band equalizer mode
Description The S5A1901H02 provides 25 levels of tone level for each band according to selected equalizer mode. This tone level is set by using incoming byte, Tone_index [7:0], after the command. Levels have the range of 0x00 (min) to 0x18 (max). Note that if the loudness function is on, then the tone control does not work since tone levels are preset in this case. Changed tone values while the loudness function is on, are updated as soon as the loudness function is turned off. * While the loudness function is being selected, the tone control is not permitted
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S5A1901H02
21. INPUT GAIN CONTROL * Format
Commands for Input Gain Control Command Code (Hex) 46 47 High Byte Ingain_adc [15:8] Ingain_dsdi1 [15:8] Low Byte Ingain_adc [7:0] Ingain_dsdi1 [7:0] Command Name Input Gain Control of ADC or DSDI2 Input Gain Control of DSDI1
Description The S5A1901H02 permits to control the input gains of ADC (or DSDI2) and DSDI1 using incoming two bytes after the command. The preset values for input gains are 0x3fff (6dB attenuation) in both.
50
AUDIO EFFECT PROCESSOR
S5A1901H02
22. OUTPUT GAIN CONTROL Format Command for Output Gain Control Command Code (Hex) Outgain_dsdo1 [15:8] Low Byte Outgain_dsdo1 [7:0] Command Name
Description The S5A1901H02 permits to control the output gain of DSDO1 using incoming two bytes after the command. The volume control can be used.
S5A1901H02
AUDIO EFFECT PROCESSOR
23. PARAMETERS FOR USER DEFINED MODE Format Commands for Setting Parameters of User Defined Mode High Byte 49 4a BL0 [15:8] 4c 4d BR0 [15:8] 4f 50 G2 [15:8] 52 53 BD0 [15:8] 55 56 G5 [15:8] 58 59 G8 [15:8] 5b 5c G11 [15:8] 5e 5f G14 [15:8] 61 62 G17 [15:8] 64 65 G20 [15:8] G18 [15:8] G19 [7:0] G20 [7:0] G15 [15:8] G16 [7:0] G17 [7:0] Gain for T5 Delay Term (Right) Gain for T6 Delay Term (Right) G12 [15:8] G13 [7:0] G14 [7:0] Gain for T2 Delay Term (Right) Gain for T3 Delay Term (Right) G9 [15:8] G10 [7:0] G11 [7:0] Gain for Left Effected Term Gain for Left Original Term G6 [15:8] G7 [7:0] G8 [7:0] Gain for T5 Delay Term (Left) Gain for T6 Delay Term (Left) BD1 [15:8] AD1 [7:0] G5 [7:0] Gain for T2 Delay Term (Left) Gain for T3 Delay Term (Left) G3 [15:8] G4 [7:0] BD0 [7:0] Postfilter Coeff. Postfilter Coeff. BR1 [15:8] AR1 [7:0] G2 [7:0] Gain for Right Term Gain for Feedback Term BL1 [15:8] AL1 [7:0] BR0 [7:0] Prefilter Coeff. (Right) Prefilter Coeff. (Right) G0 [15:8] G1 [7:0] BL0 [7:0] Prefilter Coeff. (Left) Prefilter Coeff. (Left) Low Byte Gain for Left Input Gain for Right Input
AUDIO EFFECT PROCESSOR
S5A1901H02
Commands for Setting Parameters of User Defined Mode (Continued) Command Code (Hex) 67 68 69 6a 6b 6c 6d 6e 6f 70 71 High Byte G21 [15:8] G22 [15:8] T0 [15:8] Tc [15:8] T1 [15:8] T2 [15:8] T3 [15:8] T4 [15:8] T5 [15:8] T6 [15:8] T7 [15:8] Low Byte G21 [7:0] G22 [7:0] T0 [7:0] Tc [7:0] T1 [7:0] T2 [7:0] T3 [7:0] T4 [7:0] T5 [7:0] T6 [7:0] T7 [7:0] Command Name Gain for Right Effected Term Gain for Right Original Term Delay Buffer Pointer of T0 Current Delay Buffer Pointer Delay Buffer Pointer of T1 Delay Buffer Pointer of T2 Delay Buffer Pointer of T3 Delay Buffer Pointer of T4 Delay Buffer Pointer of T5 Delay Buffer Pointer of T6 Delay Buffer Pointer of T7
Description These parameters are provided for user to design his or her own sound mode. The list of parameters (see Block Diagram for User Defined Mode in Chapter 3.) is one of sound modes provided in the S5A1901H02. In fact, most of sound modes in the S5A1901H02, e.g., hall, super woofer and so on, have similar structure. By changing parameters given in Figure , one can obtain completely different sound mode. Loading parameters which are redefined by user can be done in running of any sound mode since the memory site for these parameters does not overlap with that for any other modes. Designed mode after loading all parameters to DSP is defined as User Defined Mode. To run this mode, simply select the command code 0x13 (see Command for Mode Selection).
AUDIO EFFECT PROCESSOR
COMMAND SUMMARY The List of Commands for Audio Effect Processor (S5A1901H02) Class (Hex) 00 Control 01 02 Reserved System Power Down Disable DSP and built-in peripherals Reserved 05 Bypass Stereo Emulation I 07 08 Super Woofer I Super Woofer II 0a 0b Hall I Hall II 0d 0e Arena I Arena II 10 11 Karaoke I Karaoke II 13 14 Movie I Movie II 16 Selection in Karaoke I Equalizer Mode Inversion Input for mic-echo comes from built-in ADC or DSDI2. Input for stage mode comes from DSDI1 The above input sources are exchanged 3-band tone control 5-band tone control 7-band tone control No selection For sound mode description, see Chapter 3 Reset sound mode Function
19 1a 1b
54
AUDIO EFFECT PROCESSOR
S5A1901H02
Command Code (Hex) 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d
Class Spectrum Request
Command Name Band0 Band1 Band2 Band3 Band4 Band5 Band6
Function Request band0 spectrum value in 5/7-band tone mode Request band1 spectrum value in 5/7-band tone mode Request band2 spectrum value in 5/7-band tone mode Request band3 spectrum value in 5/7-band tone mode Request band4 spectrum value in 5/7-band tone mode Request band5 spectrum value in 7-band tone mode Request band6 spectrum value in 7-band tone mode Cancel vocal component in a sound mode except for Movie I, II No selection Emphasis low & high freq. components according to volume level No selection Set volume level to - dB Recover the volume level Bypass input from built-in ADC or DSDI2 to DSDO1 No selection Two input signals are added to produce an input for sound mode No selection The result effected by sound mode is passed to DSDO1 for recording The result further controlled by equalizer, volume and balance is passed to built-in DAC and DSDO2 for speaker output The above connection is exchanged Reserved
Vocal Canceller
On Off
Loudness
On Off
Mute
On Off
Bypass On On Chip Function Off Mixing On Off Output Channel Selection Normal
2e 2f
Inversion
55
S5A1901H02
AUDIO EFFECT PROCESSOR
Command Code (Hex) 30 31 32 33 34 35 36
Class Digital data format & Input Configuration
Command Name Format for DSDI1 Format for DSDO1 Format for DSDI2 Format for DSDO2 Format for Chip Control
Function Select format for digital input source1 using incoming byte Select format for digital output source1 using incoming byte Select format for digital input source2 using incoming byte Select format for digital output source2 using incoming byte Define Input Configuration & Control Interrupt using incoming byte Set volume level using incoming byte 0 x 00: max level, 0 x 6d: min level Set left/right balance level using incoming byte Balance left: 0 x 00 (min) to 0 x 6d (max) Balance right: 0 x 80 (min) to 0 x ed (max) Select mic-echo delay using incoming byte 0 x 01 (min delay) to 0 x 05 (max delay) Set band0 tone level in 3/5/7-band mode using incoming byte 0 x 00 (min level) to 0 x 18 (max level) Set band1 tone level in 3/5/7-band mode using incoming byte Set band2 tone level in 3/5/7-band mode using incoming byte Set band3 tone level in 5/7-band mode using incoming byte Set band4 tone level in 5/7-band mode using incoming byte Set band5 tone level in 7-band mode using incoming byte Set band6 tone level in 7-band mode using incoming byte
Volume Balance
Volume Control Balance Left/Right Control
37 38
Mic-echo scale Equalizer Tone Level Control
Mic-echo scale Band0 Tone Level
39 3a 3b 3c 3d 3e 3f 40
Band1 Tone Level Band2 Tone Level Band3 Tone Level Band4 Tone Level Band5 Tone Level Band6 Tone Level
Reserved for Host Test
56
AUDIO EFFECT PROCESSOR
S5A1901H02
Class (Hex) 41 42 43
Function
45 46 control DSDI1 Input Gain Value 48 49 for User Defined (see Block Diagram in Output Gain DSDO1 Output Gain Value G0 G1 BL0 BL1 bytes Set left input gain using incoming 2 bytes Set right input gain using incoming two bytes Set left prefilter coeff. using incoming two bytes Built-in ADC & DSDI2 Set input gain value for built-in ADC & DSDI2 using incoming two bytes
4d 4e 4f
BR0 BR1 AR1
51 52 53 54 55 56 AD1 G5 G6 59 5a G8 G9 5c 5d G11
Set left term gain using incoming two bytes Set right term gain using incoming two bytes Set feedback term gain using incoming two bytes Set postfilter coeff. using incoming two bytes
Set left delay gains using incoming two bytes
57
S5A1901H02
AUDIO EFFECT PROCESSOR
Command Code (Hex) 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71
Class Parameters for User Defined Mode (see Block Diagram in Chapter 3)
Command Name G12 G13 G14 G15 G16 G17 G18 G19 G20 G21 G22 T0 Tc T1 T2 T3 T4 T5 T6 T7
Function Set left effected term gain using incoming two bytes Set left original term gain using incoming two bytes Set right delay gains using incoming two bytes
Set right effected term gain using incoming two bytes Set right original term gain using incoming two bytes Set delay buffer pointer using incoming two bytes (Delay pointer should follow inequality: 0 x 1800 > T0 > T7 > T6 > T5 > T4 > T3 > T2 > T1)
58
AUDIO EFFECT PROCESSOR
S5A1901H02
NOTIFICATION FOR MICROCONTROLLER PROGRAMMING Fade-in/ Fade-out: To avoid noise due to abrupt change of signal, hardware configuration or filter coefficients, the fade-out and fade-in processes in the S5A1901H02 happen in following situations. * Change sound mode * * * * * * * * Change equalizer mode Change hardware configuration related to "Digital data format and Input configuration". Change "Source selection in Karaoke mode I" "Vocal Canceller" is turned on or off "Loudness Function" is turned on or off "Mixing Function" is turned on or off "Bypass On-chip Function" is turned on or off "Output channel selection" is turned into reversion from normal, or vise versa.
The time for finishing fade-out and fade-in processes needs about 0.9 ms for sound mode change and about 0.4 ms for other cases. Note that the S5A1901H02 denies process of any function received from microcontroller during fade-out or fade-in process. Sound Mode Selection: * When one of Karaoke modes is selected, "Bypass On-chip Function" or "Mixing Function" is automatically turned off if one of them is turned on and "Source selection in Karaoke I" is set to normal. Thus, the microcontroller should change the status of "Mixing Function", "Bypass On-chip Function" and "Source selection in Karaoke I" at this time. Note that "Source selection in Karaoke I" can be inverted only in Karaoke mode I.
Equalizer Mode Selection: * Equalizer modes and loudness function are exclusive, and thus, equalizer mode cannot be selected while loudness function is working. To select equalizer mode, the loudness function should be turned off first.
Vocal Canceller: * Movie modes do not work with this function. In S5A1901H02, this function is ignored in one of Movie modes. Thus, if the sound mode is one of Movie modes, the microcontroller dose not make this function to be selected.
59
S5A1901H02
AUDIO EFFECT PROCESSOR
Flowchart for initialization:
After reset, at least 10ms required for hardware initialization
Reset
Mute
Command: 0x27
Only when using digital ports
Set Digital Data Formats
Command: 0xe0 (ADC on), 0xe1 (DSIU1 on), 0xe2 (DSIU2 on), 0xe3 (ADC & DSIU1 on), 0xe4 (DSIU1 & DSIU2 on)
Input Source Selection
Sound Mode Selection
Command: 0x18 (3-band) 0x19 (5-band) 0x1a (7band) 0x1b (Defeat)
Equalizer Mode Selection
Command: 0x05 (No Effect Mode) 0x06 (Stereo Emulation I) 0x07 (Stereo Emulation II) 0x08 (Super Woofer I) 0x09 (Super Woofer II) 0x0a (Super Woofer III) 0x0b (Hall I) 0x0c (Hall II) 0x0d (Stage) 0x0e (Arena I) 0x0f (Arena II) 0x10 (News/ Drama) 0x11 (Karaoke I) 0x12 (Karaoke II) 0x13 (User Defined Mode) 0x14 (Movie I) 0x15 (Movie II)
Command: 0x38 + parameter (band0) 0x39 + parameter (band1) 0x3a + parameter (band2) 0x3b + parameter (band3) 0x3c + parameter (band4) 0x3d + parameter (band5) 0x3e + parameter (band6) parameter: 0x00 (-12dB) ~ 0x18 (+12dB)
Tone Control
Volume Control
Command: 0x35 + parameter parameter: 0x00 (0dB) ~ 0x6d (-infdB)
60
AUDIO EFFECT PROCESSOR
S5A1901H02
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings Characteristics DC Supply Voltage DC Input Voltage Storage Temperature Operating Temperature Symbol VDD VI Tstg Top Value - 0.3 - +7.0 - 0.3 - VDD + 0.3 - 40 - + 125 - 40 - + 110 Unit V V
C C
Recommended Operating Conditions Characteristics DC Supply Voltage DC Input Voltage Commercial Temperature Industrial Temperature Symbol VDD VI TA Value 4.75 - 5.25 0 - VDD 0 - +70 -20 - +85 Unit V V C C
61
S5A1901H02
AUDIO EFFECT PROCESSOR
DC Characteristics (VDD = 4.75 ~ 5.25 V, Ta = 0 ~ 70 C) Characteristics High Level Input Voltage Low Level Input Voltage Schmitt trigger, positivegoing threshold Schmitt trigger, negativegoing threshold High Level Input Current Symbol VIH VIL VT+ VTIIH Condition CMOS CMOS CMOS CMOS VIN = VDD (Input Buffer) VIN = VDD (with pull-down) Low Level Input Current IIL VIN = VSS (Input Buffer) VIN = VSS (with pull-up) High Level Output Voltage Low Level Output Voltage Operating Current Static Current VOH VOL IDD IST IOH = -1mA IOL = 1mA XI = 16.9344MHz All input/ Bidirection pins = VSS except RESB, MCLK, HWEB,CLKS Operating Frequency FOSC CLKS = 0 XI = 16.9344MHz 5 % - 100 2.4 - - 50 - - 120 1.5 - 10 - 0.4 150 10 A V V mA mA Min. 0.7 VDD - - 1.0 - 10 - - 10 0.3 Typ. - - - - Max. - 0.3 VDD 4.0 - 10 Unit V V V V A mA A
0.9
10
62
AUDIO EFFECT PROCESSOR
S5A1901H02
Codec Analog Characteristics Parameter Sampling Rate (Fs) Over Sampling Rate Master Clock Frequency ADC Resolution DAC Resolution Passband Stopband Common Mode Voltage Signal to Noise Ratioi Min 4 - - - - 0 0.4 Fs 2.0 - Typ 44.1 128 256 16 16 - - 2.25 80 Max 50 - - - - 0.4 Fs 0.6 Fs 2.45 - Unit KHz Fs Fs bits bits Hz Hz V dB
i. measured from low pass filter (30KHz cutoff) output
63
S5A1901H02
AUDIO EFFECT PROCESSOR
System Clock and Reset
XI (16.9344MHz)
MCLK (33.8688MHz)
TXIR
TXIF
CLKO (11.2896MHz) TXIRO TXIFO
X-tal Oscillator SYSTEM CLOCK(CLKS=0)
MCLK (33.8688MHz)
TCLKL
TCLKH TR TF
External SYSTEM CLOCK(CLKS=1)
RESB
TRESB
SYSTEM RESET
Figure 31.
AC Characteristics XI Rise Edge to MCLK XI Fall Edge to MCLK XI Rise to CLKO XI Fall to CLKO External Clock High Width External Clock Low Width External Clock Rise Time External Clock Fall Time Reset Pulse Width
Symbol TXIR TXIF TXIRO TXIFO TCLKH TCLKL TR TF TRESB
Min. - - - - - - - - 22.6
Typ. 10 11 12 13 14.75 14.75 - - -
Max. - - - - - - 2 2 -
Unit ns ns ns ns ns ns ns ns s
64
AUDIO EFFECT PROCESSOR
S5A1901H02
Host Interface Timing Diagram
HWEB
TWEBS
THWEBH
TWAIT
HCLK
THCLKL
THCLKH
HDATA
THDATAS THDATAH
Figure 32.
AC Characteristics HWEB Setup to First HCLK Edge HWEB Hold to Last HCLK Edge HCLK Pulse Width High HCLK Pulse Width Low HDATA Input Setup Time HDATA Input Hold Time HWEB Wait Time
Symbol TWEBS TWEBH THCLKH THCLKL THDATAS THDATAH TWAIT
Min. 50 50 1.25 1.25 50 50 1
Typ. - - - - - - -
Max. - - - - - - -
Unit ns ns s s ns ns ms
65
S5A1901H02
AUDIO EFFECT PROCESSOR
Digital Audio Interface 1 Timing Diagram
DLRCKI
TLRCKIS
TLRCKIH
DBCKI
TBCKIL
TBCKIH
DSDI
TDSDIS TDSDIH
Figure 33.
AC Characteristics DLRCKI Setup to First DBCKI Edge DLRCKI Hold to Last DBCKI Edge DBCKI Pulse Width High DBCKI Pulse Width Low DSDI Input Setup Time DSDI Input Hold Time
Symbol TLRCKIS TLRCKIH TDBCKIH TDBCKIL TDSDIS TDSDIH
Min. 20 20 177 177 10 10
Typ. - - - - - -
Max. - - 354 354 - -
Unit ns ns ns ns ns ns
66
AUDIO EFFECT PROCESSOR
S5A1901H02
DLRCKO
TLRCKOS
TLRCKOH
DBCKO
TBCKOL
TBCKOH
DSDO
TDSDOS TDSDOH
Figure 34.
AC Characteristics DLRCKO Setup to First DBCKO Edge DLRCKO Hold to Last DBCKO Edge DBCKO Pulse Width High DBCKO Pulse Width Low DSDO Output Setup Time DSDO Output Hold Time
Symbol TLRCKOS TLRCKOH TDBCKOH TDBCKOL TDSDOS TDSDOH
Min 20 20 177 177 10 10
Typ - - - - - -
Max - - 354 354 TBCKOL - 10 TBCKOH
Unit ns ns ns ns ns ns
67
S5A1901H02
AUDIO EFFECT PROCESSOR
APPLICATION CIRCUIT DIAGRAM
1. AUDIO
C1 68P X1 16.9344MHZ CRYSTAL R1 1M
C2 68P
C4 C0.1uF
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 DLRCKO1 VDD7 GND7 DSDI1 DBCKI1 DLRCKI1 VDD8 GND8 HACK TINT1 CTSDO SPWDN TODR CLKO VDD9 GND9 XO XI CLKS MCLK VDD10 GND10 CMCLKS CTSDI CTPWDN DS2 GND11 VDD11 EBC PDC
U1
R2 10K
C7 C8+ C9 330pF C11 10UF + + +
10UF
4.7UF
R3 10K R4 R5 10K 10K R6 10K
ZD1 5.6V R19 1K R20 1K C14 +
C5 C0.1uF 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100
CTEST DTEST TCSEL0 TCSEL1 GND12 VDD12 TUPD TCLK TSEN TIDR CTRAPFI CTLAPFI RESB VCC1 VSS1 VREFI VREF ARI ALI VCC2
KD16901 S5A1901H02
DBCKO1 DSDO1 DLRCKO2 DBCKO2 DSDO2 GND6 VDD6 DLRCKI2 DBCKI2 DSDI2 GND5 VDD5 SDA SCL GND4 VDD4 HDATA HWEB HCLK HMS
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
C6 C0.1uF
C1210UF C15 330pF ZD2 5.6V
SAS GND3 VDD3 EB0 EB1 EB2 EB3 EB4 EB5 EB6 EB7 GND2 VDD2 EB8 EB9 EB10 EB11 GND1 VDD1 EB12 EB13 EB14 EB15 GND0 VDD0 GND13 VDD13 VSS2 AR0 ALO
100UF R7 R1 ohm(1/4W)
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C0.1uF C16
R18 R1(1/4W) + C18 100UF
+
R9 2.7K
C19 4.7UF
+
C20 4.7UF
R10 2.7K
+
-
+
-
+12VDC
8
U2A 4558 4 R12 7.5K
+12VDC
8
U2B 4558 4 VEE R11 7.5K
3 1
2
5 7
6
VEE
R13 300 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 U3 KA22686 LIN RIN PSN1 VBLAS PSN2 WNF PSN3 WOUT PSN4 REOUT PSN5 LIOUT PSN6 RIOUT VCC GND LPF1 TR.L NC BA.L SCL OFCL SDA LOUT VSS ROUT WOOC OFCR VOLC BA.R BALC TR.R Ka22686 R16 R300 R17 R300 + C25 10UF 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
R14 300 C21 22UF + C22 10UF +
R15 1 Ohm(1/4W) + C23 100UF +
4.7UF C24
C26 C27 10UF 10UF + 10 11 12 +
CNS01-12P
68
1 NC1
2 NC2
3 12VDC
4 LIN
5 RIN
6 AGND
7 5VDC
8 SDA
9 SCL
DGND
LOUT
ROUT
Figure 35.
AUDIO EFFECT PROCESSOR
S5A1901H02
APPLICATION CIRCUIT DIAGRAM
2. KARAOKE
D1
R1 DVCC R JK1 DC JACK U2 LM7805CT 1 IN GND C3 10UF 2
DVCC AVCC C1 39P C2 39P X1 16.9344MHZ C31 0.1UF C4 10UF R2 1M
POWER
VCC
GND
OUT
3
C30 0.1UF S1 RESET
RESB
C5 0.33UF R3 200K C6 R5 C0.47uF 1K U3A NE5532 1 DVCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14
DBCKI1 DLRCKI1 U1 AD1877_ADC 28 LRCK CLKIN 27 WCLK TAG 26 BCLK SOUT 25 DVDD1 DVDD2 24 DGND1 DGND2 23 RDEDGE RESETB 22 S/MB MSBDLYB 21 384/256B RLJUST 20 AVDD AGND 19 VINL VINR 18 CAPL1 CAPR1 17 CAPL2 CAPR2 16 AGND AGNDR 15 VREFL VREFR C14 0.1UF C27 C0.1uF 81 82 83 84 85 86 87 88 89 90 91 92 93 RESB 94 95 96 97 98 99 100 CTEST DTEST TCSEL0 TCSEL1 GND12 VDD12 TUPD TCLK TSEN TIDR CTRAPFI CTLAPFI RESB VCC1 VSS1 VREFI VREF ARI ALI VCC2
DVCC RESB
DSDI1
R4 R150 J1 2 1 3 MIC JACK
AVCC JP1 1 2 3 HEADER 3
C9 C0.01uF
VREFI VREF
+
3
8
2
R6 300R
C7 1UF
AVCC
C8 1UF
4
C27 C0.1uF
C27 C0.1uF
51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
C32 2.2nF
C10 470PF
U4
DLRCKO1 VDD7 GND7 DSDI1 DBCKI1 DLRCKI1 VDD8 GND8 HACK TINT1 CTSDO SPWDN TODR CLKO VDD9 GND9 XO XI CLKS MCLK VDD10 GND10 CMCLKS CTSDI CTPWDN DS2 GND11 VDD11 EBC PDC
C17 0.1UF C13 470PF C16 4.7UF C18 47UF +
C15 C11 C12 4.7UF 470PF 470PF
KD16901A
S5A1901H02
VREFI
AUDIO IN
J3 RIN J4 LIN
R9 R300
C20 2.2nF
C19 0.1UF C18 10UF + R300 R10 C24 C2.2nF C21 0.47UF
VREF
C18
10UF
DBCKO1 DSDO1 DLRCKO2 DBCKO2 DSDO2 GND6 VDD6 DLRCKI2 DBCKI2 DSDI2 GND5 VDD5 SDA SCL GND4 VDD4 HDATA HWEB HCLK HMS
50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31
DVCC C27 0.1uF R8 R7 R2.7K R2.7K J2 1 3 5 7 9 DVCC
SDA SCL HDATA HWEB HCLK
2 4 6 8 10
RESB
Figure 36.
+ R10 R1 ohm +
HOST COMMAND C27 C0.1uF
SAS GND3 VDD3 EB0 EB1 EB2 EB3 EB4 EB5 EB6 EB7 GND2 VDD2 EB8 EB9 EB10 EB11 GND1 VDD1 EB12 EB13 EB14 EB15 GND0 VDD0 GND13 VDD13 VSS2 AR0 ALO
C26 100UF
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 R11 R1K C24 2.2nF R11 R1K C24 2.2nF 10UF C25 JP2 HOST SEL J5 LOUT J6 ROUT R10 C27 0.1uF C27 0.1uF
MICOM
AVCC
DVCC
DVCC
I2C
R1 ohm + C26 100UF
10UF + C25
+
1 2 3
69
S5A1901H02
AUDIO EFFECT PROCESSOR
NOTES
70

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